The graying of the semiconductor workforce as onshore manufacturing ramps up means the days of chip companies poaching each other’s talent are numbered—their local communities must develop talent through the collaboration of schools and workforce development organizations.

In the first of two panel discussions hosted by the National Institute of Innovation and Technology (NIIT), those collaborating to help build the talent pipeline for Texas’s semiconductor and advanced manufacturing sectors said they are working to deliver flexible options for apprenticeships to meet the demand for skilled workers with options that allow apprentices to earn a living while learning.

Austin Community College District has been collaborating with workforce development organizations and semiconductor companies to create entry pathways at various points and equip students with the right skills, especially in manufacturing.

Austin Community College District is increasingly giving tours to middle school students to expose them early to programs that will set them on a career path in semiconductors and advanced manufacturing.

The college’s Make It Center provides guests of all ages a chance to experience a wide range of experiences to pique their interest in advanced manufacturing careers, including an area dubbed “The Forge,” where they can use 3D printing, laser cutters and vacuum formers to create career-related projects. There are also virtual-reality simulations that allow users to “try out” different careers by immersing themselves in various job sites.

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Gary Hilson is a freelance writer with a focus on B2B technology, including information technology, cybersecurity, and semiconductors.

Semiconductor technologies live and die by industry standards, but are there times when it makes sense to build a heavily customized—even proprietary—memory device?

The chip sector is replete with standards organizations that guide the evolution of widely adopted memory devices. JEDEC is responsible for DRAM, LPPDR, GDDR and high-bandwidth memory (HBM), among others. The Peripheral Component Interconnect Express Special Interest Group takes care of the most ubiquitous protocol for data movement, while NVMe Express and the CXL Consortium built their specifications with PCIe as their foundation. Most recently, the UCIe was developed to bring best practices to chiplets.

The highway of DRAM technologies is littered with the roadkill of non-JEDEC-standard memories. If something isn’t JEDEC-standard, or if a DRAM vendor tries to go it alone with something that they want to differentiate with, it’s going to die.

Among the many abandoned memories that never saw widespread use are Micron Technology’s HBM competitor, Hybrid Memory Cube, and Rambus’s virtual-channel DRAM, even though the latter had the backing of Intel.

The value of a standardized memory device is that it can be multi-sourced—an SK Hynix product will plug into the same socket as a Micron product.

That’s not to say some vendors aren’t offering special features. There will be DRAM vendors that will have their own special features that they unlock for special customers, and it’s still standard DRAM.

Some memories that are developed by more than one vendor may show potential but are subsequently abandoned by all but one of the vendors. Reduced-latency DRAM was initially developed by Infineon Technologies in the late 1990s; Micron was subsequently brought in as a development partner and a second source, but Infineon opted to exit the market.

The challenge of being the sole source of a memory product that has a strong customer base—especially if it’s a Tier 1 customer—is that it’s difficult to end-of-life the product.

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Gary Hilson is a freelance writer with a focus on B2B technology, including information technology, cybersecurity, and semiconductors.

Digital twins aren’t a new tool for the chip industry, but they are getting democratized to a point where they are more accessible for a broader set of commercial applications.

The ability to ingest more, higher-quality data from a wider array of sources and the application of artificial intelligence is helping to extend digital twins beyond product design to virtually envision manufacturing environments, which will reduce waste as well as contribute to meeting sustainability goals. And as the chip industry ramps up U.S. onshore manufacturing in the wake of the CHIPS Act, digital twins are poised to be a critical tool for workforce development while also accelerating productivity.

In early February 2024, the National Institute of Standards and Technology (NIST) announced its intent to create a new semiconductor manufacturing institute that will use digital twin technology for production, packaging and assembly. NIST is looking to corral curriculum and best practices through its CHIPS Research and Development Office to launch a competition for a new public-private Manufacturing USA Institute.

Digital twins are more effective when silos of information are eliminated, Grieves added. “Depending on what functional area they were in, you wound up with huge inefficiencies or the inability to optimize the entire process.”

Expanding the use of digital twins out to manufacturing facilities is the natural evolution of the virtual approach the chip industry has used for decades. Digital twins are being extended to visualize equipment and manufacturing facilities before they are built, then optimized once they are in production.

Digital twins can be used to build anything, so why not the manufacturing facilities that produce semiconductors—not just the devices themselves?

Building a digital twin of a fab allows for the modeling of the manufacturing of the chip, making it possible to optimize a facility before concrete is ever poured.
A digital twin does more than simulate the manufacturing process. It also optimizes all the electricity, water and chemicals being used, which helps to achieve sustainability goals.

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Gary Hilson is a freelance writer with a focus on B2B technology, including information technology, cybersecurity, and semiconductors.

To help meet the demands of new fabs being built in the United States, apprenticeships are emerging as a key strategy for scaling up the talent pipeline.

Taiwan Semiconductor Manufacturing Company (TSMC), for example, sees apprenticeships as critical to supporting its workforce needs as it looks to staff two big fabs.

Developing people—giving them the skills and the on-the-job experience they’ll need to secure a permanent post—takes time, especially because there are unique skills needed that aren’t immediately available. 

TSMC’s recently announced apprenticeship program in the Phoenix area focuses on developing people for a facility technician role by providing 2,000 hours of on-the-job training in four key skills areas: water treatment, gas and chemicals, electrical, and mechanical. Courses are provided by TSMC’s technical-instruction partner, Maricopa Community Colleges.

Mentorship is critical to the process: Apprentices are paired with mentors for one-on-one guidance.

TSMC identified technicians as a focus area based on its hiring needs over the next few years. The company is working with the entities in Arizona that are responsible for workforce development in the state and its various municipalities, including the Workforce Arizona Council.

NXP Semiconductor has also been working with Maricopa since early last year. The company began looking at developing apprenticeship programs in mid-2022. NIIT has helped the company map out the process for developing a semiconductor equipment technician apprenticeship, which encompasses multiple specialty areas.

Apprenticeships fall into NIIT’s broader responsibility of executing a national strategy to build the talent pipeline to support strategic industry sectors.

NIIT is the only federally recognized entity contracted by the U.S. Department of Labor to establish and expand registered apprenticeships throughout the semiconductor and nanotechnology-related industry supply chain.

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Gary Hilson is a freelance writer with a focus on B2B technology, including information technology, cybersecurity, and semiconductors.

The role of magnetism in memory technology is well-understood, but researchers at the Hebrew University of Jerusalem recently discovered a connection between light and magnetism that could give rise to light-controlled memory.

The magnetic properties of light have historically garnered less attention because of the slower response of magnets compared with the rapid behavior of light radiation.

The research shows that the magnetic component of a rapidly oscillating light wave possesses the ability to control magnets, redefining principal physical properties. The discovery is contrary to conventional thinking because it focuses on the magnetic aspect of light.

Read my full story on EE Times.

Gary Hilson is a freelance writer with a focus on B2B technology, including information technology, cybersecurity, and semiconductors.